Optical I/O (chiplet optics)
Optical transceivers built as chiplets inside the package of a processor, joined to the compute die by a die-to-die interface, so that the processor's off-package traffic leaves as light. Aimed at the links that join accelerators into one system.
Optical I/O places the optics in the same package as a processor, a GPU, CPU or custom accelerator, as a separate chiplet sitting beside the compute die. The chiplet receives data from the processor over a short die-to-die interface and sends it off the package on fiber. In current usage co-packaged optics most often refers to optical engines around a network switch ASIC, replacing front-panel pluggable modules; optical I/O is the same physical idea aimed at compute-to-compute links, above all the scale-up fabric that joins many accelerators into one system and has so far been carried on copper over a meter or two.
Two figures of merit dominate: bandwidth per millimeter of die edge, because the edge of a package is where every signal must leave, and energy per bit. The energy figure multiplies quickly. A chiplet moving 4 Tb/s at 5 pJ/bit draws 20 W; at 1 pJ/bit it draws 4 W; a package carries several such chiplets. Designs for this role therefore favor many slow lanes over a few fast ones: many wavelengths per fiber on a WDM grid, each modulated by a microring at a rate that simple drivers and receivers can handle without the equalization and DSP of a long-reach SerDes. The light usually comes from an external laser source on the CW-WDM grids, and multi-wavelength sources, including microcombs, are candidates to supply all the lines at once. Chiplet interface standards such as UCIe define the electrical side, so that an optical chiplet from one supplier can be paired with a compute die from another.
The obstacles lie mostly outside the photonics. Microring resonances move with temperature, by about 0.07 nm/K for a silicon ring (from at 1550 nm, with silicon's K⁻¹ and = 4.2), and a processor package swings by tens of kelvin, so every ring needs a heater and a control loop to hold it on its channel. Fiber attach must be done at scale and must survive package assembly, and each chiplet must be tested before it is committed to a package whose other contents are far more expensive. Serviceability is the sharpest difference from a pluggable: a failed chiplet cannot be swapped, which is one reason the lasers are kept outside. The architecture is intermediate between near-packaged optics, which keeps the optics on the board beside the package, and fully monolithic integration.
References: M. Wade et al., IEEE Micro 40(2), 63 (2020); UCIe Consortium, Universal Chiplet Interconnect Express Specification 1.0 (2022); CW-WDM MSA specifications, cw-wdm.org. The light-source side is covered in Light sources for co-packaged optics.