Thermal Tuning and Locking of Ring Resonators

Scope

This article covers the thermal side of ring resonators: the temperature coefficient of a resonance and where it comes from, the power a heater needs to move a resonance by a free spectral range, the response time that comes with that power, the bistability that appears when the ring heats itself, and the methods used to lock a resonance to a channel. The ring resonator explorer shows how the resonance shape depends on loss and coupling; this article is about where the resonance sits and how it is held there. Background: ring resonator, thermo-optic phase shifter, free spectral range, and the thermo-optic coefficients article for the material data.

The tuning coefficient

A ring resonates where an integer number of wavelengths fits the round trip, $m\lambda = n_\mathrm{eff} L$, and the resonance moves with temperature because $n_\mathrm{eff}$ does. Differentiating with the group index in place of the effective index (the group index is what fixes the resonance spacing) gives

$$\frac{d\lambda}{dT} = \frac{\lambda}{n_g}\,\frac{dn_\mathrm{eff}}{dT} \approx \frac{\lambda}{n_g}\,\Gamma\,\frac{dn}{dT},$$

where $\Gamma$ is the fraction of the mode's index sensitivity that lives in the core, close to 1 for a tightly confined silicon strip and lower for a weakly confined nitride waveguide; thermal expansion of the ring adds a term of order $10^{-6}$ per kelvin and is negligible next to the index term for the platforms below.

In frequency, 67 pm/K at 1550 nm is 8.4 GHz/K. That number decides most of what follows: a silicon ring with a loaded Q of $10^4$ has a linewidth of 155 pm and a 1 K change moves it by 43% of that width; a ring with a Q of $10^5$ has a linewidth of 15.5 pm and is moved by a full linewidth for 0.23 K. Nothing in a datacenter holds a chip to a quarter of a kelvin, so any high-Q silicon ring in a product is locked, not set.

What a heater costs

To tune a ring anywhere within its comb, the heater must move a resonance by one free spectral range. A silicon ring of 10 µm radius has $\mathrm{FSR} = \lambda^2/(n_g L) = 8.9$ nm and needs $8.9\ \mathrm{nm} / 67\ \mathrm{pm/K} = 133$ K of core temperature rise for a full FSR; a 20 µm ring needs 66 K for its 4.45 nm FSR. The heater power to hold that temperature is $P = G_\mathrm{th}\,\Delta T$, with $G_\mathrm{th}$ the thermal conductance from heater to core. For a metal heater on 1 µm of oxide above the waveguide, a one-dimensional estimate over a 2 µm wide, 63 µm long track gives 0.28 mW/K, and lateral spreading into the buried oxide and the silicon substrate raises the real value to something like 0.3 to 1 mW/K. The full-FSR power is then 40 to 130 mW for the 10 µm ring, an efficiency of 0.07 to 0.22 nm/mW, which brackets the published values for standard heaters. Removing the substrate under the ring (an undercut) or trenching around it cuts $G_\mathrm{th}$ by an order of magnitude or more; Dong et al. reported 2.4 mW per free spectral range on undercut silicon racetracks, an order of magnitude or more better than the standard geometry.

The gain is not free. The response time of the heater is the thermal time constant $\tau = C_\mathrm{th}/G_\mathrm{th}$, with $C_\mathrm{th}$ the heat capacity of the volume that must warm. The heated oxide and silicon around a 10 µm ring hold a few times $10^{-10}$ J/K, so a standard heater with $G_\mathrm{th}$ of 0.5 mW/K responds in about a microsecond at the core and in a few microseconds once the surrounding oxide is included, which is what measurements show. Cutting $G_\mathrm{th}$ by an order of magnitude with an undercut leaves $C_\mathrm{th}$ roughly unchanged, so the response slows by the same factor, into the tens to hundreds of microseconds. The product $P_\pi \tau$, equivalently $P_\mathrm{FSR}\tau$, is the figure of merit that thermal design cannot beat, because it equals $C_\mathrm{th}\Delta T$ and depends only on how much material must be heated by how much. Efficiency is bought with speed, and a system that must lock quickly after a channel change keeps the substrate under the ring.

At the system level the cost is a power budget. A DWDM link with 32 ring modulators, each tuned to an arbitrary point within its FSR, dissipates on average half the full-FSR power per ring: 20 to 65 mW each for standard heaters, 0.6 to 2 W for the array, before any data is modulated. This is the arithmetic behind the interest in undercut heaters, in athermal claddings, and in matching ring FSRs to the channel grid so that tuning ranges stay small.

Thermal bistability

A ring also heats itself. Light circulating in a high-Q ring is absorbed, weakly by the material and, in silicon, by two-photon absorption and the free carriers it generates, and the heat shifts the resonance toward longer wavelength while the light is on it. For a laser scanned from short to long wavelength, the resonance runs ahead of the laser as it heats and the transmission dip stretches into a triangular sawtooth; scanned the other way, the ring drops out abruptly. The lineshape depends on the scan direction, the scan speed, and the power, which is thermal bistability, and it is the reason a Q measured at high input power on silicon is not a Q. The onset is set by the circulating power and the ring's thermal resistance: for a silicon ring with a Q of $10^5$, input powers of a few hundred microwatts can already distort the line, so Q extraction is done at low power, with a scan in both directions to confirm the lineshape is symmetric before the fit in the Q extraction procedure is trusted. The same effect provides thermal self-locking when the laser sits on the blue side of the resonance, which some systems use deliberately and every system meets accidentally.

Locking

A locked ring needs an error signal that says which way the resonance has moved and an actuator, almost always the heater, to move it back. The methods differ in how they obtain the error signal.

Dither locking modulates the heater by a small amount at a kilohertz rate and demodulates the transmitted or dropped power at that frequency. The demodulated signal is the derivative of the lineshape with respect to wavelength: zero on the peak, positive on one side, negative on the other, which is a textbook error signal. It costs a small residual wavelength modulation (a fraction of the linewidth) and the bandwidth of the loop is limited to a fraction of the dither frequency, typically tens of hertz to a kilohertz, which is adequate for ambient drift and not for anything faster.

Power monitoring without dither uses a tap on the drop port or an in-resonator monitor. An integrated photodetector reading a small fraction of the circulating light, through a defect-mediated absorption section or a contactless probe that senses the free carriers the light generates, reports the circulating power directly; the loop then maximizes it, which is a peak search and needs either a dither or a slope-based estimate to know the direction. Its advantage is that it needs no external tap and works on every ring independently.

Data-driven locking, used in transceivers, takes the error signal from the link itself: the modulated eye, the received bit-error rate, or the average power at the output of a ring modulator, which depends on where the carrier sits on the resonance slope. It is slow but free, and it locks the ring to the condition that matters, best modulation, rather than to the resonance peak, which for a ring modulator is not the operating point in any case.

Whichever signal is used, the loop's speed is set by the heater's thermal time constant and its lock range by the tuning range. A microsecond heater supports loop bandwidths of tens of kilohertz; a locked ring in a transceiver typically settles within milliseconds of power-up, then tracks. Athermal designs reduce the demand on the loop rather than replace it: a cladding with negative $dn/dT$ (a polymer or titanium dioxide) can cancel most of the silicon coefficient for one mode at one wavelength, bringing 67 pm/K down to a few pm/K, at the price of a weaker waveguide and a coefficient that returns away from the design point.

What to record

A ring's thermal behavior is characterized by four numbers, and a report that has all of them saves the next person a week: the tuning coefficient in pm/K measured on a temperature-controlled stage; the heater efficiency in nm/mW, or equivalently the power per FSR; the thermal time constant from a heater step; and the input power below which the lineshape is symmetric. The first two give the tuning range and its power cost, the third gives the loop bandwidth, and the fourth gives the power at which every other measurement on the ring is still valid.

References: K. Padmaraju and K. Bergman, "Resolving the thermal challenges for silicon microring resonator devices," Nanophotonics 3, 269 (2014); P. Dong et al., "Thermally tunable silicon racetrack resonators with ultralow tuning power," Opt. Express 18, 20298 (2010); T. Carmon, L. Yang and K. J. Vahala, "Dynamical thermal behavior and thermal self-stability of microcavities," Opt. Express 12, 4742 (2004); A. Arbabi and L. L. Goddard, "Measurements of the refractive indices and thermo-optic coefficients of Si₃N₄ and SiOₓ using microring resonances," Opt. Lett. 38, 3878 (2013); B. J. Frey, D. B. Leviton and T. J. Madison, "Temperature-dependent refractive index of silicon and germanium," Proc. SPIE 6273 (2006). The tuning coefficients, FSR temperatures, and heater-power estimates above are computed from the stated parameters.