Heterogeneous integration

Heterogeneous integration is the combination of two or more distinct material systems on a single photonic integrated circuit, using bonding, transfer-printing, or selective epitaxial growth to assemble materials that cannot share a single epi growth process. The most common variant in photonics is III–V on silicon: bonding small InP or GaAs dies onto a CMOS-fabricated silicon photonic wafer to add active functions (lasers, semiconductor optical amplifiers, modulators) that silicon cannot perform natively.

Why heterogeneous integration matters. Silicon photonics is strong at waveguides and passive structures, and it offers fast modulators and germanium-on-silicon photodetectors. But silicon has an indirect bandgap: it cannot lase efficiently at room temperature. Adding lasers to silicon photonic systems requires either:

• External laser modules with fiber I/O to the silicon PIC (high cost, packaging-dominated)
• Heterogeneous integration of III–V lasers on the silicon chip itself (low cost at scale, lower packaging burden)

Intel shipped silicon photonic transceivers with heterogeneously integrated lasers in volume before moving that module business to Jabil in 2023, and foundries and research centers are developing bonding, transfer-printing and epitaxial routes to the same end.

Standard integration techniques.

Standard process flow for heterogeneous III–V-on-silicon:

1. Fabricate silicon photonic wafer with passive structures (waveguides, MMI couplers, ring resonators, edge couplers, photodetectors) using standard CMOS-compatible processes
2. Planarize the top of the silicon photonic wafer and prepare the bonding surface
3. Bond unprocessed III-V dies or a wafer (containing the epi stack for laser active regions) face-down onto the silicon waveguides
4. Remove the III-V substrate by selective etching, leaving only the thin epitaxial laser structure bonded to silicon
5. Pattern III-V mesas, contacts, and metallization aligned to the underlying silicon waveguides
6. Singulate and test

Optical coupling between III-V and silicon. The silicon waveguide and the III-V active region must transfer light between them efficiently. Standard approach: an adiabatic taper in the III-V mesa width gradually shifts the optical mode from being primarily in the III-V (where it sees gain) to primarily in the silicon (where it propagates with low loss). Typical adiabatic transition: 100 – 500 μm long, single-mode transition with $<0.5$ dB loss.

Performance vs monolithic InP. Heterogeneously-integrated lasers on silicon now reach competitive performance:

• Threshold current: 10 – 30 mA (vs 5 – 15 mA for native InP)
• Side-mode suppression ratio: 40 – 50 dB
• Slope efficiency: 0.15 – 0.30 W/A
• Operation to 80 °C
• Bandwidth: 25 – 30 GHz directly-modulated

The cost advantage is the dominant motivation: heterogeneous integration on a CMOS-compatible silicon photonic substrate can use the same wafer-scale infrastructure as silicon ICs.

Future direction: monolithic III-V on silicon. Growing the III-V active region directly on silicon by epitaxy (rather than wafer-bonding) would simplify the process further. Quantum-dot lasers grown on silicon have demonstrated room-temperature CW operation and approach commercial viability. Threading-dislocation densities of ${10}^7-{10}^8$ cm${}^{-2}$ remain a challenge versus $<{10}^4$ cm${}^{-2}$ in native InP.

References: D. Liang and J. E. Bowers, "Recent progress in lasers on silicon," Nature Photonics 4, 511 (2010); T. Komljenovic et al., "Heterogeneous silicon photonic integrated circuits," J. Lightwave Technol. 34, 20 (2016).