200G per lane (IEEE 802.3dj)
The Ethernet generation that carries 200 Gb/s on each electrical and optical lane using PAM4 at about 106 to 113 GBd, and builds 800G and 1.6T links from four or eight such lanes.
Ethernet grows by doubling the rate on each lane and then ganging lanes. The 100G-per-lane generation signaled PAM4 at 53.125 GBd; the IEEE 802.3dj project doubles that to 200 Gb/s per lane, on the electrical interface between chips and modules (200GAUI-1) and on the fiber, and uses it to define 200G, 400G, 800G and 1.6T Ethernet. The project was scheduled to complete in 2026.
The optical lanes come in two variants that differ in their error correction, and therefore in their symbol rate. The shorter-reach variant carries the host's RS(544,514) forward error correction alone and runs at 106.25 GBd, a 212.5 Gb/s line rate. The longer-reach variant, marked with a "-2" suffix, adds an inner Hamming(128,120) code inside the optical module, which raises the rate to 113.4375 GBd (226.875 Gb/s) and buys the margin needed for 2 km.
| PHY | Lanes | Reach | Symbol rate per lane | FEC |
|---|---|---|---|---|
| 200GBASE-DR1 | 1 | 500 m | 106.25 GBd | RS(544,514) |
| 200GBASE-DR1-2 | 1 | 2 km | 113.4375 GBd | RS + inner Hamming |
| 800GBASE-DR4 | 4 | 500 m | 106.25 GBd | RS(544,514) |
| 800GBASE-DR4-2 | 4 | 2 km | 113.4375 GBd | RS + inner Hamming |
| 1.6TBASE-DR8 | 8 | 500 m | 106.25 GBd | RS(544,514) |
The unit interval at 106.25 GBd is 9.41 ps, half that of the previous generation, and nearly every part of the link feels the halving. The transmitter's electro-optic bandwidth must reach roughly half the symbol rate, which is at the edge of what directly modulated lasers and silicon modulators offer and has pushed the generation toward electro-absorption modulated lasers, thin-film lithium niobate, and heavier transmit equalization. The reference receiver used for TDECQ compliance grew from a 5-tap to a 15-tap equalizer, and the measurement itself, as described in the TDECQ measurement procedure, needs a sampling oscilloscope with bandwidth around 60 GHz.
The generation also decides the fate of the linear architectures. At 100G per lane a module without a DSP (LPO) could rely on the host SerDes to equalize the whole channel; at 200G the electrical channel loss budget is tighter and the optics less linear, which is why LRO, which keeps a retimer on transmit, gained attention, and why co-packaged optics become more attractive as the lane rate rises. The comparison of these options with consistent power figures is in Pluggable, LRO, LPO, CPO.
References: IEEE P802.3dj Task Force, 200 Gb/s, 400 Gb/s, 800 Gb/s, and 1.6 Tb/s Ethernet (project documents, 2023 to 2026); B. Welch, "Baseline proposals for FECo & FECi consensus," IEEE 802.3dj, November 2023.