Sidewall roughness

Every etched waveguide wall carries a residue of the process that made it: the grain of the photoresist edge, the line-edge roughness transferred by the etch, and the vertical striations the plasma leaves behind. A guided mode whose field reaches the wall sees a boundary that wanders by a few nanometres, and each excursion is a small perturbation of the dielectric that radiates a little of the mode's power into the cladding. Summed over a centimetre of waveguide, that is propagation loss, and in silicon-on-insulator wires it is most of the propagation loss there is.

Describing the roughness

Two numbers characterize a rough wall for optical purposes. The rms amplitude $\sigma$ is the standard deviation of the wall position along the propagation direction; the correlation length $L_c$ is the distance over which excursions stop resembling each other, defined through the autocorrelation function of the edge profile, which is usually taken as exponential, $R(u) = \sigma^2 \exp(-|u|/L_c)$. Both are measured by tracing the edge in a top-down SEM or by AFM on the sidewall itself and computing the autocorrelation, or equivalently the power spectral density, of the trace. Representative values: about 5 nm rms with $L_c \approx 45$ nm on deep-UV-patterned SOI wires (Jaberansary 2013); 7 nm rms on dry-etched silicon falling to 1.2 nm after anisotropic wet etching (Debnath 2016); 0.53 nm rms with $L_c = 47$ nm on electron-beam-patterned silicon nitride made with a low-polymer etch (Roberts 2022). The correlation length is set mostly by the resist and the etch chemistry and sits in the tens of nanometres for most processes; the amplitude is where processes differ.

From roughness to loss

The standard estimate is Payne and Lacey's analysis of a slab waveguide of half-width $d$, core index $n_1$, and cladding index $n_2$ with exponentially correlated roughness. In decibels per unit length,

where $k_0 = 2\pi/\lambda$, $g(V) = U^2 V^2/(1+W)$ collects the slab mode parameters ($V = k_0 d\sqrt{n_1^2 - n_2^2}$ is the V-number, $U$ and $W$ the transverse wavenumbers in core and cladding, both in units of $1/d$), and

where $f$ carries the dependence on correlation length. Three features of the expression are the ones that matter in practice. The loss is proportional to $\sigma^2$, so halving the roughness quarters the loss. For a fixed mode shape it falls as $d^{-4}$, though $g(V)$ rises with width for a strongly guided mode and the net effect over practical widths is still steep: Vlasov and McNab measured 3.6 dB/cm in 445 nm wide SOI wires and, reviewing earlier work, note losses falling from 33.8 dB/cm at 400 nm width to 2.4 dB/cm at 500 nm. And $f$ passes through a maximum as $L_c$ varies, so for any waveguide there is a worst correlation length and a hard upper bound on the scattering loss that depends only on $\sigma$, $d$, and $n_1$; roughness that is much finer or much coarser than the optical scale scatters less. Barwicz and Haus extended the analysis to three-dimensional wires, where the scattered power depends on the polarization and on the field at the wall in ways the slab model does not capture; the slab expression is the estimate, and their treatment is the reference for a quantitative fit.

A consequence of the index dependence: the same 2 nm of roughness that costs a silicon wire dB per centimetre costs a silicon nitride waveguide of the same width far less, because the perturbation scales with the index step at the wall ($n_1^2 - n_2^2$) and the nitride mode is wider. This is the physical basis of nitride's loss advantage, and of the rib waveguide: moving the mode away from the etched wall reduces the field at the roughness.

Reducing it

Because the loss is quadratic in $\sigma$, most low-loss processes are roughness-reduction processes. Thermal oxidation of silicon consumes the rough surface and leaves a smoother one under a thin oxide, the approach introduced by Lee and colleagues in 2001; wet chemical oxidation cycles do the same at lower thermal budget (Sparacin 2005); anisotropic wet etching along crystal planes gives atomically flat walls (1.2 nm rms and 0.85 dB/cm in 380 nm wide wires, Debnath 2016); etchless waveguides defined by oxidation rather than etching reached 0.3 dB/cm in silicon (Cardenas 2009); and in nitride, the Damascene reflow process and low-polymer etches bring $\sigma$ below 1 nm and losses to about 1 dB/m (Liu 2021; Roberts 2022). Resist reflow before the etch and optimized lithography address the correlation length as well as the amplitude. Whatever the route, the cutback method on waveguides of several widths is the standard way to separate sidewall scattering (width-dependent) from absorption and substrate leakage (width-independent) in the measured loss.

References: F. P. Payne and J. P. R. Lacey, "A theoretical analysis of scattering loss from planar optical waveguides," Optical and Quantum Electronics 26, 977 (1994). T. Barwicz and H. A. Haus, "Three-dimensional analysis of scattering losses due to sidewall roughness in microphotonic waveguides," Journal of Lightwave Technology 23, 2719 (2005). K. K. Lee et al., "Fabrication of ultralow-loss Si/SiO₂ waveguides by roughness reduction," Optics Letters 26, 1888 (2001). D. K. Sparacin, S. J. Spector, and L. C. Kimerling, "Silicon waveguide sidewall smoothing by wet chemical oxidation," Journal of Lightwave Technology 23, 2455 (2005). E. Jaberansary et al., "Scattering loss estimation using 2-D Fourier analysis and modeling of sidewall roughness on optical waveguides," IEEE Photonics Journal 5, 6601010 (2013). K. Debnath et al., "Low-loss silicon waveguides and grating couplers fabricated using anisotropic wet etching technique," Frontiers in Materials 3, 10 (2016). S. Roberts, X. Ji, J. Cardenas, M. Corato-Zanarella, and M. Lipson, "Measurements and modeling of atomic-scale sidewall roughness and losses in integrated photonic devices," Advanced Optical Materials 10, 2102073 (2022). Y. A. Vlasov and S. J. McNab, "Losses in single-mode silicon-on-insulator strip waveguides and bends," Optics Express 12, 1622 (2004). J. Cardenas et al., "Low loss etchless silicon photonic waveguides," Optics Express 17, 4752 (2009). J. Liu et al., "High-yield, wafer-scale fabrication of ultralow-loss, dispersion-engineered silicon nitride photonic circuits," Nature Communications 12, 2236 (2021).