Junction capacitance

Junction capacitance is the capacitance of the depletion region of a diode. The layer stripped of free carriers acts as the dielectric of a parallel-plate capacitor whose plates are the edges of the neutral p and n regions, so

$$C_j = \frac{\varepsilon A}{W},$$

with $\varepsilon$ the permittivity of the semiconductor, $A$ the junction area and $W$ the depletion width. Values range from tens of femtofarads to hundreds of picofarads: a 30 µm diameter InGaAs PIN photodiode with a 1 µm depleted layer ($\varepsilon_r \approx 13.9$) has 87 fF, and a 1 mm² silicon junction about 109 pF at zero bias. In a photodiode it is charged through the load resistance and sets one of the two bandwidth limits; the RC time constant entry works the 87 fF diode into 50 Ω, an RC limit of 37 GHz, and combines it with the transit limit.

Dependence on bias

Because $W$ changes with voltage, so does $C_j$. For an abrupt one-sided junction with lighter-side doping $N$, built-in voltage $V_\text{bi}$ and reverse bias $V_R$,

$$C_j = A\sqrt{\frac{q\,\varepsilon N}{2\,(V_\text{bi}+V_R)}},$$

so the capacitance falls as the inverse square root of the total voltage. For silicon with $N = 10^{15}$ cm⁻³ and $V_\text{bi}$ = 0.7 V, a 1 mm² junction has 109 pF at zero bias, 70 pF at 1 V and 38 pF at 5 V, consistent with the depletion widths of 0.95 and 2.7 µm worked in the reverse bias entry. Linearly graded junctions, typical of diffused or implanted profiles, follow a cube-root dependence instead. In a PIN structure the intrinsic layer is fully depleted at a small bias, after which $W$ equals the layer thickness and the capacitance hardly changes with further bias. A 2 µm absorber halves the 30 µm diode's capacitance to 43 fF at the cost of a longer transit time.

C-V measurement and doping profiles

Squaring and inverting the abrupt-junction expression gives a straight line in voltage,

$$\frac{1}{C_j^2} = \frac{2\,(V_\text{bi}+V_R)}{q\,\varepsilon N A^2},$$

so the slope of $1/C^2$ against $V_R$ gives the doping,

$$N = \frac{2}{q\,\varepsilon A^2}\left[\frac{d(1/C^2)}{dV_R}\right]^{-1},$$

and the intercept on the voltage axis gives $-V_\text{bi}$. For the 1 mm² silicon junction above the slope is $1.20 \times 10^{-4}$ pF⁻² per volt, and inserting it returns $N = 10^{15}$ cm⁻³. When the doping is not uniform, the local slope gives the doping at the depletion edge $W = \varepsilon A/C$, and sweeping the bias traces a doping profile. The measurement uses an LCR meter or impedance analyzer, which superimposes a small AC signal on the DC bias; the open-fixture capacitance is subtracted, and the diode is kept dark, since photocurrent disturbs the reading.

Parasitics and the receiver

The capacitance a circuit sees is the junction capacitance plus that of the bond pads, the package and the amplifier input. For small high-speed diodes these terms are comparable: 30 fF of pad capacitance added to the 87 fF junction raises the total to 117 fF and lowers the 50 Ω RC limit from 37 GHz to 27 GHz. In a transimpedance amplifier the input capacitance sets the bandwidth for a given feedback resistance and turns the amplifier's voltage noise into a current noise that rises with frequency, so receiver design usually starts from the diode capacitance.

Diffusion capacitance in forward bias

Under forward bias a p-n junction stores injected minority carriers whose charge changes with voltage, adding a diffusion capacitance, in the charge-control approximation

$$C_d = \frac{\tau I}{n V_T},$$

where $\tau$ is the carrier lifetime, $I$ the forward current, $n$ the ideality factor and $V_T = k_BT/q$ = 25.85 mV at 300 K. It grows with current and quickly exceeds the depletion capacitance. For a light-emitting diode with $\tau$ = 3 ns at 20 mA and $n$ = 1, the differential resistance $nV_T/I$ is 1.29 Ω and $C_d$ is 2.3 nF; their product is $\tau$ itself, so the optical modulation bandwidth, about $1/(2\pi\tau)$ = 53 MHz, is set by the recombination time. Above threshold in a laser diode the carrier density clamps, and the small-signal response is governed by the rate equations and the relaxation oscillation; in equivalent circuits of a directly modulated laser the junction capacitance, series resistance and pad capacitance form a parasitic low-pass that can limit bandwidth before the intrinsic response does.

Pitfalls

C-V data taken at a frequency where series resistance is not negligible underestimate the capacitance; forward bias beyond a few tenths of a volt adds diffusion capacitance and conduction that invalidate the depletion formula; and a datasheet capacitance is quoted at a stated bias, which may differ from the operating point.

Common questions

Why does reverse bias lower the junction capacitance?

Reverse bias widens the depletion region, increasing the plate spacing $W$ of the capacitor. For an abrupt junction the capacitance falls as $1/\sqrt{V_\text{bi}+V_R}$; in a PIN diode it stops falling once the intrinsic layer is fully depleted.

What is the difference between junction capacitance and diffusion capacitance?

Junction capacitance comes from the fixed charge at the edges of the depletion region and dominates in reverse bias; diffusion capacitance comes from minority carriers stored in the neutral regions, dominates in forward bias and grows in proportion to the current.

How is doping found from a C-V measurement?

With $1/C^2$ plotted against reverse voltage, uniform doping gives a straight line whose slope is $2/(q\varepsilon N A^2)$, and whose intercept gives the built-in voltage.

References: S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd ed. (Wiley, 2007); B. E. A. Saleh and M. C. Teich, Fundamentals of Photonics, 3rd ed. (Wiley, 2019); D. K. Schroder, Semiconductor Material and Device Characterization, 3rd ed. (Wiley, 2006); L. A. Coldren, S. W. Corzine and M. L. Mašanović, Diode Lasers and Photonic Integrated Circuits, 2nd ed. (Wiley, 2012).