Submount
The thermally-conductive and electrically-insulating substrate that supports a laser die or other active optoelectronic device. Provides the mechanical, thermal, and electrical interface between the chip and its package.
A submount is the precision-fabricated substrate that physically supports a semiconductor laser die or other active optoelectronic chip within a package. It serves four functions simultaneously:
- Mechanical support: holds the die at a known position with sub-micron precision
- Thermal conduction: transfers heat from the active region to the package's heat-rejection path (TEC, heatsink, cold finger)
- Electrical interconnect: patterned metallization routes signals between bonding pads and the die
- Electrical isolation: separates the chip's anode and cathode (and RF signal and ground), which are too close on the chip itself
Materials. The submount material must combine high thermal conductivity, low coefficient of thermal expansion (matching the chip to avoid thermomechanical stress over temperature cycling), and electrical insulation (the chip cannot be electrically shorted through the submount). Standard options:
| Material | Thermal cond. (W/m·K) | CTE (ppm/K) | Notes |
|---|---|---|---|
| Aluminum nitride (AlN) | 170 – 220 | 4.5 | Standard for InP laser submounts |
| Beryllium oxide (BeO) | 250 – 300 | 7 | Higher thermal conductivity, but BeO dust is toxic; largely replaced by AlN |
| Silicon carbide (SiC) | 300 – 400 | 4 | Premium high-power applications |
| Polycrystalline diamond (CVD diamond) | 1000 – 2000 | 1 | Highest performance and highest cost |
| Silicon | 150 | 2.6 | Used when silicon-photonic integration is desired |
| Copper-tungsten (Cu-W) | 180 | 6 – 8 | Metallic; usually used as carrier plate under an insulating submount |
InP laser CTE is ppm/K; GaAs is ppm/K. Submount CTE close to the die value minimizes thermal stress during operation and over wide-range thermal cycling.
Geometry and patterning. Typical telecom DFB laser submount geometry:
- Overall size: 2 × 1 × 0.3 mm
- Top metallization: gold-plated, patterned for anode pad, cathode pad, RF transmission line if applicable
- Solder bumps or wire-bond pads for die attachment
- Optional integrated features: thermistor pad for nearby temperature sensing, monitor photodiode for back-facet output, capacitor for RF decoupling
Die attach. The laser die is bonded to the submount with one of several materials:
| Method | Thermal performance | Compliance | Typical use |
|---|---|---|---|
| Au-Sn eutectic solder (80/20) | Excellent (57 W/m·K) | Low | High-reliability hermetic packages |
| Pb-Sn solder (legacy) | Good | Medium | Older designs; being phased out (RoHS) |
| Silver-loaded epoxy | Moderate (5 – 20 W/m·K) | High | Lower-cost, lower-reliability |
| Silver-epoxy bonded laser die on silicon | Moderate (5 – 20 W/m·K) | High | Heterogeneous integration on a silicon photonic carrier; an active research topic |
| Sintered nano-silver | Excellent (200 W/m·K) | Low | Emerging; competes with Au-Sn |
Why the submount matters. The submount and its die attach sit in series with the chip in the heat path from the junction to the TEC or heat sink. In a narrow-ridge laser much of the thermal resistance lies in the chip itself, where the heat spreads out from a stripe a few micrometers wide; the submount's share grows for broad-area and high-power lasers and for epi-down mounting, where the chip's own resistance is small. Any added resistance raises the junction temperature at a given current, which raises the threshold and lowers the slope efficiency, so the rollover current falls. The loss is not proportional to the added resistance, because the threshold grows exponentially with temperature (see characteristic temperature).
The submount also strongly influences high-frequency response: parasitic capacitance and inductance of the wire bonds and submount transmission lines limit modulation bandwidth. Directly modulated laser packages for 25 Gb/s and 100 Gb/s use carefully impedance-matched transmission lines on the submount with controlled wire-bond geometries.
Package formats and their thermal paths are covered in laser diode packages.
References: C. J. M. Lasance and A. Poppe (eds.), Thermal Management for LED Applications (Springer, 2014) covers submount thermal design; Mickelson et al., Optoelectronic Packaging for the comprehensive treatment.